View MC100EPT21DG_564106.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MC100EPT21 3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
The MC100EPT21 is a Differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL (Positive ECL), LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only +3.3 V and ground are required. The small outline 8-lead SOIC package makes the EPT21 ideal for applications which require the translation of a clock or data signal. The VBB output allows this EPT21 to be cap coupled in either single-ended or differential input mode. When single-ended cap coupled, VBB output is tied to the D input and D is driven for a non-inverting buffer, or VBB output is tied to the D input and D is driven for an inverting buffer. When cap coupled differentially, VBB output is connected through a resistor to each input pin. If used, the VBB pin should be bypassed to VCC via a 0.01 mF capacitor. For additional information see AND8020/D. For a single-ended direct connection use an external voltage reference source such as a resistor divider. Do not use VBB for a single-ended direct connection or port to another device.
Features http://onsemi.com MARKING DIAGRAMS*
8 8 1 SO-8 D SUFFIX CASE 751 1 KPT21 ALYW G
8 8 1 TSSOP-8 DT SUFFIX CASE 948R 1 KA21 ALYWG G
* * * * * * * *
1.4 ns Typical Propagation Delay Maximum Frequency > 275 MHz Typical LVPECL/LVDS/CML Inputs, LVTTL/LVCMOS Outputs 24 mA TTL outputs Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V The 100 Series Contains Temperature Compensation VBB Output Pb-Free Packages are Available
A L Y W M G
DFN8 MN SUFFIX CASE 506AA
1 = Assembly Location = Wafer Lot = Year = Work Week = Date Code = Pb-Free Package
(Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
1
December, 2006 - Rev. 15
Publication Order Number: MC100EPT21/D
3R MG G 4
MC100EPT21
Table 1. PIN DESCRIPTION
NC 1 8 VCC Q D 2 LVTTL 7 Q D**, D** VCC VBB D 3 LVPECL 6 NC GND NC EP VBB 4 5 GND PIN FUNCTION LVTTL/LVCMOS Output Differential LVPECL/LVDS/CML Input Positive Supply Output Reference Voltage Ground No Connect Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply or leave floating open.
Figure 1. Logic Diagram and 8-Lead Pinout (Top View)
** Pins will default to VCC/2 when left open.
Table 2. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Value 50 kW 50 kW > 1.5 kV > 100 V > 2 kV Level 1 UL 94 V-0 @ 0.125 in 81 Devices
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
Table 3. MAXIMUM RATINGS
Symbol VCC VIN IBB TA Tstg qJA qJC qJA qJC qJA Tsol Parameter PECL Power Supply PECL Input Voltage VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Wave Solder Pb Pb-Free 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm < 2 to 3 sec @ 248C <2 to 3 sec @ 260C SO-8 SO-8 SO-8 TSSOP-8 TSSOP-8 TSSOP-8 DFN8 DFN8 Condition 1 GND = 0 V GND = 0 V VI VCC Condition 2 Rating 3.8 0 to 3.8 0.5 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 129 84 265 265 Unit V V mA C C C/W C/W C/W C/W C/W C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
http://onsemi.com
2
MC100EPT21
Table 4. PECL INPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0.0 V (Note 2)
-40C Symbol VIH VIL VBB VIHCMR Characteristic Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) Input HIGH Current Input LOW Current -150 Min 2075 1355 1910 1.2 2035 Typ Max 2420 1675 2160 3.3 Min 2075 1355 1910 1.2 2035 25C Typ Max 2420 1675 2160 3.3 Min 2075 1355 1910 1.2 2035 85C Typ Max 2420 1675 2160 3.3 Unit mV mV mV V
IIH IIL
150 -150
150 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input parameters vary 1:1 with VCC. 3. VIHCMR min varies 1:1 with GND, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 5. LVTTL/LVCMOS OUTPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0.0 V, TA = -40C to 85C
Symbol VOH VOL ICCH ICCL IOS Characteristic Output HIGH Voltage Output LOW Voltage Power Supply Current Power Supply Current Output Short Circuit Current Condition IOH = -3.0 mA IOL = 24 mA Outputs set to HIGH Outputs set to LOW 5 8 -130 12 18 Min 2.4 0.5 20 26 -80 Typ Max Unit V V mA mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
Table 6. AC CHARACTERISTICS VCC = 3.0 V to 3.6 V, GND = 0.0 V (Note 4)
-40C Symbol fmax tPLH, tPHL tSKPP tJITTER VPP tr tf Characteristic Maximum Frequency (Figure 2) Propagation Delay to Output Differential Part-to-Part Skew (Note 5) Random Clock Jitter (RMS) Input Voltage Swing (Differential Configuration) Output Rise/Fall Times (0.8V - 2.0V) Q, Q 150 3.5 800 Min 275 800 1200 Typ 350 1400 1400 2050 1800 500 5 1200 150 3.5 800 Max Min 275 800 1200 25C Typ 350 1400 1400 2250 1800 500 5 1200 150 3.5 800 Max Min 275 900 1100 85C Typ 350 1600 1300 2950 1900 500 5 1200 ps ps ps mV ps 250 600 900 250 600 900 250 600 900 Max Unit MHz
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Measured with a 750 mV 50% duty-cycle clock source. RL = 500 W to GND and CL = 20 pF to GND. Refer to FIgure 3. 5. Skews are measured between outputs under identical transitions.
http://onsemi.com
3
MC100EPT21
3000 VOH 2500 VOUTpp (mV)
2000 VOL 0.5 V 1500
1000
500
0 0 50 100 150 200 250 300 350 400 450 500 550 600 FREQUENCY (MHz)
Figure 2. Fmax
APPLICATION
TTL RECEIVER
CHARACTERISTIC TEST
*CL includes fixture capacitance
CL*
RL
AC TEST LOAD
GND
Figure 3. TTL Output Loading Used For Device Evaluation
http://onsemi.com
4
MC100EPT21
ORDERING INFORMATION
Device MC100EPT21D MC100EPT21DG MC100EPT21DR2 MC100EPT21DR2G MC100EPT21DT MC100EPT21DTG MC100EPT21DTR2 MC100EPT21DTR2G MC100EPT21MNR4 MC100EPT21MNR4G Package SOIC-8 SOIC-8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) DFN8 DFN8 (Pb-Free) Shipping 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 100 Units / Rail 100 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
http://onsemi.com
5
MC100EPT21
PACKAGE DIMENSIONS
SOIC-8 NB CASE 751-07 ISSUE AH
-X- A
8 5
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
MC100EPT21
PACKAGE DIMENSIONS
TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A
8x
K REF 0.10 (0.004)
M
0.15 (0.006) T U
S 2X
TU
S
V
S
L/2
8
5
L
1 PIN 1 IDENT 4
B -U-
0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_
C 0.10 (0.004) -T- SEATING
PLANE
D
-W- G DETAIL E
DIM A B C D F G K L M
http://onsemi.com
7
MC100EPT21
PACKAGE DIMENSIONS
DFN8 CASE 506AA-01 ISSUE D
D A B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 --- 0.25 0.35
PIN ONE REFERENCE
2X
0.10 C
2X
0.10 C
0.10 C
8X
0.08 C
SEATING PLANE
A1
8X
L
K
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
CCCC CCCC CCCC CCCC
D2 e/2
1 8
E
TOP VIEW
DIM A A1 A3 b D D2 E E2 e K L
A
SIDE VIEW
(A3) C
e
4
E2
5 8X
b
0.10 C A B 0.05 C
NOTE 3
BOTTOM VIEW
http://onsemi.com
8
MC100EPT21/D

▲Up To Search▲

Price & Availability of MC100EPT21DG

	To Download MC100EPT21DG Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .